Iei-integration iQ7-US15W User Manual

IQ7 Design Guide Page i IEI Technology Corp. User Manual IQ7 Design Guide IQ7 Design Guide for IQ7-US15W and IQ7-DB-MITX Rev. 1.01 – 22 July, 2009

IQ7 Design Guide Page x List of Tables Table 1-1: Technical Specifications...

IQ7 Design Guide Page 88 6.3.4 Hardware Health Configuration The Hardware Health Configuration menu (BIOS Menu 7) shows the operating temperature,

IQ7 Design Guide Page 89 Î Thermal Mode The fan adjusts its speed using these settings: TargetTemp Value Tolerance Value Startup Value Stop Va

IQ7 Design Guide Page 90  StartUp Value [050] WARNING: CPU failure can result if this value is set too high This is the initial speed of the fan

IQ7 Design Guide Page 91 6.3.5 AHCI Configuration Use the AHCI Settings menu (BIOS Menu 8) to report on the auto-detection of devices connected to t

IQ7 Design Guide Page 92 6.3.5.1 AHCI Port n Use the AHCI Port n configuration menu (BIOS Menu 9) to configure the drive connected to SATA connector

IQ7 Design Guide Page 93 6.3.6 Intel AMT Configuration Use the Intel AMT menu (BIOS Menu 10) to enable the system to be managed through the Intel® A

IQ7 Design Guide Page 94 6.3.6.1 ME Subsystem Configuration Use the ME Subsystem Configuration menu (BIOS Menu 11) to configure the Intel® Managemen

IQ7 Design Guide Page 95  End of Post S5 HECI Message [Enabled] Use the End of Post S5 HECI Message option to enable or disable the Intel® AMT the

IQ7 Design Guide Page 96 6.3.7 Remote Access Configuration Use the Remote Access Configuration menu (BIOS Menu 12) to configure remote access par

IQ7 Design Guide Page 97  Serial Port Number [COM1] Use the Serial Port Number option allows to select the serial port used for remote access.  C

IQ7 Design Guide Page xi Table 4-26: USB Connector Pinouts...

IQ7 Design Guide Page 98 Î Disabled The console is not redirected after POST Î Boot Loader Redirection is active during POST and during Boot Load

IQ7 Design Guide Page 99  Onboard SiS USB1.1 DEVICE [Enabled] Use the Onboard SiS USB1.1 DEVICE BIOS option to enable or disable the onboard SiS U

IQ7 Design Guide Page 100 Î Disabled USB 2.0 controller disabled Î Enabled DEFAULT USB 2.0 controller enabled  Legacy USB Support [Enabled] Use t

IQ7 Design Guide Page 101 6.3.8.1 USB Mass Storage Device Configuration Use the USB Mass Storage Device Configuration menu (BIOS Menu 14) to configu

IQ7 Design Guide Page 102  Emulation Type [Auto] Use the Emulation Type BIOS option to specify the type of emulation BIOS has to provide for the U

IQ7 Design Guide Page 103 6.4 PCI/PnP Use the PCI/PnP menu (BIOS Menu 15) to configure advanced PCI and PnP settings. BIOS SETUP UTILITY Main Advan

IQ7 Design Guide Page 104 Î 16K 16 KB reserved for legacy ISA devices Î 32K 32 KB reserved for legacy ISA devices Î 64K 64 KB reserved for legacy

IQ7 Design Guide Page 105 6.5.1 Boot Settings Configuration Use the Boot Settings Configuration menu (BIOS Menu 17) to configure advanced system boo

IQ7 Design Guide Page 106  AddOn ROM Display Mode [Force BIOS] Use the AddOn ROM Display Mode option to allow add-on ROM (read-only memory) messag

IQ7 Design Guide Page 107 6.5.2 Boot Device Priority Use the Boot Device Priority menu (BIOS Menu 18) to specify the boot sequence from the availabl

IQ7 Design Guide Page xii BIOS Menus BIOS Menu 1: Main ...

IQ7 Design Guide Page 108 6.5.3 Hard Disk Drives Use the Hard Disk Drives menu to specify the boot sequence of the available HDDs. Only installed ha

IQ7 Design Guide Page 109 6.5.5 CD/DVD Drives Use the CD/DVD Drives menu to specify the boot sequence of the available CD/DVD drives. Only connected

IQ7 Design Guide Page 110  Change Supervisor Password Use the Change Supervisor Password to set or change a supervisor password. The default for t

IQ7 Design Guide Page 111 6.7 Chipset Use the Chipset menu (BIOS Menu 23) to access the Northbridge and Southbridge configuration menus BIOS SETUP U

IQ7 Design Guide Page 112  Integrated Graphics Mode Select [Enable, 4 MB] This setting determines whether the internal graphics device is used, an

IQ7 Design Guide Page 113 6.7.2 Southbridge Configuration The Southbridge Configuration menu (BIOS Menu 25) the Southbridge chipset to be configured

IQ7 Design Guide Page 114 6.8 Exit Use the Exit menu (BIOS Menu 26) to load default BIOS values, optimal failsafe values and to save configuration c

IQ7 Design Guide Page 115  Load Failsafe Defaults Use the Load Failsafe Defaults option to load failsafe default values for each of the parameters

IQ7 Design Guide Page 116 Appendix A A BIOS Options

IQ7 Design Guide Page 117 Below is a list of BIOS configuration options in the BIOS chapter.  System Overview ...

IQ7 Design Guide Page 1 Chapter 1 1 IQ7-US15W Introduction

IQ7 Design Guide Page 118  HECI Message [Enabled]...

IQ7 Design Guide Page 119  Flat Panel Type...

IQ7 Design Guide Page 120 Appendix B B Terminology

IQ7 Design Guide Page 121 AC ’97 Audio Codec 97 (AC’97) refers to a codec standard developed by Intel® in 1997. ACPI Advanced Configuration and Powe

IQ7 Design Guide Page 122 DMA Direct Memory Access (DMA) enables some peripheral devices to bypass the system processor and communicate directly wit

IQ7 Design Guide Page 123 LCD Liquid crystal display (LCD) is a flat, low-power display device that consists of two polarizing plates with a liquid

IQ7 Design Guide Page 124 Appendix C C Hazardous Materials Disclosure

IQ7 Design Guide Page 125 C.1 Hazardous Materials Disclosure Table for IPB Products Certified as RoHS Compliant Under 2002/95/EC Without Mercury The

IQ7 Design Guide Page 126 Toxic or Hazardous Substances and Elements Part Name Lead (Pb) Mercury (Hg) Cadmium(Cd) Hexavalent Chromium(CR(VI)) Polybr

IQ7 Design Guide Page 127 此附件旨在确保本产品符合中国 RoHS 标准。以下表格标示此产品中某有毒物质的含量符合中国 RoHS 标准规定的限量要求。 本产品上会附有”环境友好使用期限”的标签，此期限是估算这些物质”不会有泄漏或突变”的年限。本产品可能包含有较短的环境友好

IQ7 Design Guide Page 2 1.1 IQ7-US15W Figure 1-1: IQ7-US15W IQ7 Design Guide The IQ7-US15W is a QSeven CPU Module with a 1.1 GHz Intel® Atom™ Z510

IQ7 Design Guide Page 3  Standard API software interface for embedded features 1.3 Features Some of the IQ7-US15W motherboard features are listed

IQ7 Design Guide Page 4 Figure 1-3: IQ7-US15W Dimensions (mm)

IQ7 Design Guide Page 5 1.6 Data Flow 5Figure 1-4 shows the data flow between the system chipset, the CPU and other components installed on the moth

IQ7 Design Guide Page 6 Specification IQ7-US15W Socket Embedded CPU Supported 1.1 GHz Intel® Atom™ Z510, 1.6 GHz Intel® Atom™ Z530 Front Side Bus (

IQ7 Design Guide Page 7 Chapter 2 2 IQ7-US15W Connector Pinouts

IQ7 Design Guide Page ii Revision Date Version Changes 22 July, 2009 1.01 Various updates and changes 19 May, 2009 1.00 Initial release

IQ7 Design Guide Page 8 2.1 Peripheral Interface Connectors This chapter gives an overview of all the connectors on the IQ7-US15W and their pin defi

IQ7 Design Guide Page 9 Internal peripheral connectors are found on the motherboard and are only accessible when the motherboard is outside of the c

IQ7 Design Guide Page 10 Pin Description Pin Description 13 GBE_LINK# 14 GBE_ACT# 15 GBE_CTREF 16 SUS_S5# 17 WAKE# 18 SUS_S3# 19 SUS_STAT#

IQ7 Design Guide Page 11 Pin Description Pin Description 75 USB_P7- 76 USB_P6- 77 USB_P7+ 78 USB_P6+ 79 USB_6_7_OC# 80 USB_4_5_OC# 81 USB_P5

IQ7 Design Guide Page 12 Pin Description Pin Description 139 SDVO_GREEN- 140 SDVO_FLDSTALL- 141 GND 142 GND 143 SDVO_BLUE+ 144 SDVO_TVCLKIN+

IQ7 Design Guide Page 13 Pin Description Pin Description 203 RSVD 204 MFG_NC4 205 VCC_5V_SB 206 VCC_5V_SB 207 MFG_NC0 208 MFG_NC2 209 MFG_NC

IQ7 Design Guide Page 14 Figure 2-3: IDE Connector Pin Description 1 NC 2 NC 3 IDERST 4 GND 5 D7 6 D8 7 D6 8 D9 9 D5 10 D10 11 D4 12 D11 13 D3 14

IQ7 Design Guide Page 15 Pin Description 23 GND 24 IOW# 25 IOR# 26 GND 27 IORDY 28 GND 29 DMACK# 30 IRQ 31 ADD1 32 CBLIB# 33 ADD0 34 ADD2 35 CS0 36

IQ7 Design Guide Page 16 Chapter 3 3 IQ7-DB-MITX Introduction

IQ7 Design Guide Page 17 3.1 Introduction Figure 3-1: IQ7-DB-MITX The IQ7-DB-MITX is a MiniITX baseboard for a QSeven CPU module. The QSeven standa

IQ7 Design Guide Page iii Copyright COPYRIGHT NOTICE The information in this document is subject to change without prior notice in order to improve

IQ7 Design Guide Page 18  Operating reliably in harsh industrial environments up to 70°C  The system is always available and will reboot if the

IQ7 Design Guide Page 19 3.4 Connectors The connectors on the IQ7-DB-MITX are shown in the figure below. Figure 3-2: Top Connectors

IQ7 Design Guide Page 20 Figure 3-3: Rear Panel Connectors 3.5 Dimensions The main dimensions of the IQ7-DB-MITX are shown in the diagram below. 

IQ7 Design Guide Page 21 Figure 3-4: IQ7-DB-MITX Dimensions (mm)

IQ7 Design Guide Page 22 The external peripheral interface connectors are shown below. Figure 3-5: External Interface Panel Dimensions (mm)

IQ7 Design Guide Page 23 3.6 Data Flow 5Figure 1-4 shows the data flow between the system chipset, the CPU and other components installed on the mot

IQ7 Design Guide Page 24 3.7 Technical Specifications IQ7-DB-MITX technical specifications are listed in 5Table 1-1. Specification IQ7 Design Guide

IQ7 Design Guide Page 25 Specification IQ7 Design Guide Operating temperature -20ºC ~ 70ºC (requires cooler and silicone heat sink paste) Humidity

IQ7 Design Guide Page 26 Chapter 4 4 IQ7-DB-MITX Connector Pinouts

IQ7 Design Guide Page 27 4.1 Peripheral Interface Connectors Section 4.1.2 shows peripheral interface connector locations. Section 4.1.2 lists all t

IQ7 Design Guide Page iv Table of Contents 1 IQ7-US15W INTRODUCTION...

IQ7 Design Guide Page 28 4.1.2 Peripheral Interface Connectors 5Table 2-1 shows a list of the peripheral interface connectors on the IQ7-DB-MITX. De

IQ7 Design Guide Page 29 4.1.3 External Interface Panel Connectors 5Table 4-2 lists the rear panel connectors on the IQ7-DB-MITX. Detailed descripti

IQ7 Design Guide Page 30 Figure 4-2: ATX Power Connector Pinout Locations Pin Description Pin Description 1 +3.3 V 13 +3.3 V 2 +3.3 V 14 -12

IQ7 Design Guide Page 31 Figure 4-3: Backlight Inverter Connector Pin Description 1 BRIGHTNESS 2 GND 3 12 V 4 GND 5 BL_EN Table 4-4: Backlight Inv

IQ7 Design Guide Page 32 Figure 4-4: CompactFlash® Slot Location 4.2.4 Digital I/O Connector CN Label: DIO1 CN Type: 10-pin header CN Location: Se

IQ7 Design Guide Page 33 Figure 4-5: Digital I/O Connector Locations Pin Description Pin Description 1 GND 2 VCC 3 Output 0 4 Output 1 5 Output

IQ7 Design Guide Page 34 Figure 4-6: Fan Connector Location Pin Description 1 Rotation signal 2 +12 V 3 Ground Table 4-6: Fan Connector Pinouts 4.

IQ7 Design Guide Page 35 Figure 4-7: Front Panel Connector Pinout Locations Pin Description Pin Description 1 Power LED+ 2 Speaker+ 3 N/C 4 N/C

IQ7 Design Guide Page 36 The IDE connector can connect to an IDE hard drive or optical device. Figure 4-8: IDE Connector Locations Pin Description

IQ7 Design Guide Page 37 Pin Description Pin Description 37 HDC CS0# 38 HDC CS1# 39 HDD ACTIVE# 40 GROUND 41 VCC 42 VCC 43 GROUND 44 N/C Table

IQ7 Design Guide Page v 4.2.1 ATX Power Connector ... 29 4.2.2 Bac

IQ7 Design Guide Page 38 Pin Description Pin Description 3 N/C 4 N/C 5 Power LED- 6 N/C 7 Power Button+ 8 Speaker- 9 Power Button- 10 N/C 11 HDD

IQ7 Design Guide Page 39 Pin Description Pin Description 3 A_Y0+ 4 A_Y0- 5 A_Y1+ 6 A_Y1- 7 A_Y2+ 8 A_Y2- 9 A_CLK+ 10 A_CLK- 11 N/C 12 N/C 13 GRO

IQ7 Design Guide Page 40 Figure 4-11: Mini USB Port Location Pin Description 1 +5 V 2 D- 3 D+ 4 NC 5 GND Table 4-11: Mini USB Port Pinouts 4.2.11

IQ7 Design Guide Page 41 Figure 4-12: PCIe x1 Connector Location Pin Description Pin Description A1 +12v B1 PRSNT#1 A2 +12v B2 +12v A3 RSVD B3

IQ7 Design Guide Page 42 CN Type: PCIe Mini card slot 52-pin, 90°, P=0.8 mm & 180°, 9.0H CN Location: See 5Figure 4-13 CN Pinouts: See Table 4-1

IQ7 Design Guide Page 43 Pin Description Pin Description 35 GND 36 USBD- 37 N/C 38 USBD+ 39 N/C 40 GND 41 N/C 42 N/C 43 N/C 44 RF_LINK# 4

IQ7 Design Guide Page 44 CN Type: QSeven connector, MXM, 230-pin, 90°, P=0.5 mm CN Location: See Figure 4-15 CN Pinouts: See Table 4-14 The QSeven C

IQ7 Design Guide Page 45 29 SATA0_TX+ 30 SATA1_TX+ 31 SATA0_TX- 32 SATA1_TX- 33 SATA_ACT# 34 GND 35 SATA0_RX+ 36 SATA1_RX+ 37 SATA0_RX- 38

IQ7 Design Guide Page 46 97 GND 98 GND 99 LVDS_A0+ 100 LVDS_B0+ 101 LVDS_A0- 102 LVDS_B0- 103 LVDS_A1+ 104 LVDS_B1+ 105 LVDS_A1- 106 LVDS_

IQ7 Design Guide Page 47 165 GND 166 GND 167 PCIE2_TX+ 168 PCIE2_RX+ 169 PCIE2_TX- 170 PCIE2_RX- 171 EXCD0_PERST# 172 EXCD1_PERST# 173 PCIE1

IQ7 Design Guide Page vi 4.4.6 TTL Voltage Selection ... 66 4.4.7

IQ7 Design Guide Page 48 229 VCC 230 VCC Table 4-14: QSeven Connector Pinouts 4.2.15 Reset Button CN Label: SW1 CN Type: Button CN Location: See

IQ7 Design Guide Page 49 Figure 4-17: SATA Drive Connector Locations 4.2.17 SATA Power Connectors CN Label: CN17, CN21, CN23 CN Type: 4-pin wafer

IQ7 Design Guide Page 50 Pin Description 1 +5 V 2 GND 3 GND 4 +12 V Table 4-15: SATA Power Connector Pinouts 4.2.18 SDVO Connector CN Label: SDVO1

IQ7 Design Guide Page 51 Pin Description Pin Description 35 SA0 36 SA2 37 HDC CS0# 38 HDC CS1# 39 HDD ACTIVE# 40 GROUND 41 VCC 42 VCC 43 GROUND

IQ7 Design Guide Page 52 Pin Description Pin Description 5 TXD1 6 CTS1 7 DTR1 8 RI1 9 GND1 10 GND1 Table 4-17: Serial Port Connector Pinouts 4.2

IQ7 Design Guide Page 53 Pin Description Pin Description 11 TFT_B2 12 TFT_B3 13 TFT_B4 14 TFT_B5 15 TFT_B6 16 TFT_B7 17 TFT_G0 18 TFT_G1 19 TFT_

IQ7 Design Guide Page 54 Figure 4-21: USB Connector Locations Pin Description Pin Description 1 VCC 2 GND 3 DATA- 4 DATA+ 5 DATA+ 6 DATA- 7 GND

IQ7 Design Guide Page 55 4.3 External Interface Connectors 5Figure 4-22 shows the IQ7-DB-MITX motherboard external interface connectors. The IQ7-DB

IQ7 Design Guide Page 56 Figure 4-23: Audio Connector Pin Description Pin Description 1 Ground 2 LMIC1-L 3 NC 4 NC 5 LMIC1-R 22 LFRONT-L 23 NC

IQ7 Design Guide Page 57 Figure 4-24: Ethernet Connector The RJ-45 Ethernet connector has two status LEDs, one green and one yellow. The green LED

IQ7 Design Guide Page vii 6.5.4 Removable Drives... 108 6.5.5

IQ7 Design Guide Page 58 Figure 4-25: PS/2 Connector Pin Description Pin Description 1 KEYBOARD DATA 7 MOUSE DATA 2 NC 8 NC 3 GND 9 GND 4 +5 V

IQ7 Design Guide Page 59 Pin Description Pin Description 3 DATA 1 16 INITIALIZE 4 DATA 2 17 PRINTER SELECT LN# 5 DATA 3 18 GROUND 6 DATA 4 19

IQ7 Design Guide Page 60 Pin Description 4 DTR 5 GND 6 DSR 7 RTS 8 CTS 9 RI 10 GND 11 GND Table 4-25: Serial Port Pinouts Figure 4-27: Serial Port

IQ7 Design Guide Page 61 Pin Description 4 Ground Table 4-26: USB Connector Pinouts 4.3.7 VGA Connector CN Label: CON1 CN Type: D-sub 15-pin female

IQ7 Design Guide Page 62 4.4 Jumper Settings NOTE: A jumper is a metal bridge that is used to close an electrical circuit. It consists of two

IQ7 Design Guide Page 63 Figure 4–29: Jumpers 4.4.1 AT/ATX Mode Selection Jumper Label: JP8 & SW5 Jumper Type: 6-pin header & switch Jumpe

IQ7 Design Guide Page 64 SW5 Description 1-On AT mode 1-Off ATX mode Table 4-30: AT/ATX Mode Selection 4.4.2 Clear CMOS Jumper Jumper Label: JP8 J

IQ7 Design Guide Page 65 4.4.3 CompactFlash® Master/Slave Selection Jumper Label: JP4 Jumper Type: 3-pin header Jumper Settings: See Table 4-32 Jum

IQ7 Design Guide Page 66 These settings enable and disabled these devices on the IQ7 Design Guide. SW3 Description 1-On & 2-Off PCIe x1 slot e

IQ7 Design Guide Page 67 SW4 Description 3-On SATA as master 3-Off SATA as slave 4-On SATA disable 4-Off SATA enabled Table 4-36: LAN & PCIe E

IQ7 Design Guide Page viii List of Figures Figure 1-1: IQ7-US15W IQ7 Design Guide...

IQ7 Design Guide Page 68 Chapter 5 5 Installation

IQ7 Design Guide Page 69 5.1 Anti-static Precautions WARNING: Failure to take ESD precautions during installation may result in permanent damage to

IQ7 Design Guide Page 70 WARNING: The installation instructions described in this manual should be carefully followed in order to prevent damage to

IQ7 Design Guide Page 71 5.3 CPU Module Installation WARNING: Only install the QSeven CPU module on a compatible QSeven baseboard like the IQ7-DB-M

IQ7 Design Guide Page 72 Figure 5-1: Installing the QSeven CPU Module Step 1: Insert the CPU module into the QSeven slot. Step 2: Press down with

IQ7 Design Guide Page 73 Chapter 6 6 BIOS

IQ7 Design Guide Page 74 6.1 Introduction The BIOS is programmed onto the BIOS chip. The BIOS setup program allows changes to certain system setting

IQ7 Design Guide Page 75 Key Function F2 /F3 key Change color from total 16 colors. F2 to select color forward. F10 key Save all the CMOS chan

IQ7 Design Guide Page 76 6.2 Main The Main BIOS menu (BIOS Menu 1) appears when the BIOS Setup program is entered. The Main menu gives an overview o

IQ7 Design Guide Page 77 o Size: Lists memory size The System Overview field also has two user configurable fields:  System Time [xx:xx:xx] Use t

IQ7 Design Guide Page ix Figure 4-18: SATA Power Connector Locations ...49 Figur

IQ7 Design Guide Page 78 6.3.1 CPU Configuration Use the CPU Configuration menu (BIOS Menu 3) to view detailed CPU specifications and configure the

IQ7 Design Guide Page 79 6.3.2 IDE Configuration Use the IDE Configuration menu (BIOS Menu 4) to change and/or set the configuration of the IDE devi

IQ7 Design Guide Page 80 6.3.2.1 IDE Master, IDE Slave Use the IDE Master and IDE Slave configuration menu to view both primary and secondary IDE de

IQ7 Design Guide Page 81  Async DMA: Indicates the highest Asynchronous DMA Mode that is supported.  Ultra DMA: Indicates the highest Synchronou

IQ7 Design Guide Page 82 Î Auto DEFAULT BIOS auto detects the LBA mode control on the specified channel.  Block (Multi Sector Transfer) [Auto] Use

IQ7 Design Guide Page 83  DMA Mode [Auto] Use the DMA Mode BIOS selection to adjust the DMA mode options. Î Auto DEFAULT BIOS auto detects the DMA

IQ7 Design Guide Page 84  32Bit Data Transfer [Enabled] Use the 32Bit Data Transfer BIOS option to enables or disable 32-bit data transfers. Î Dis

IQ7 Design Guide Page 85  RS-485 Control for SP1 [Disabled] This feature enables Automatic Send Data Control when using the RS-485 communication p

IQ7 Design Guide Page 86  Serial Port4 Address [2E8] Use the Serial Port4 IRQ option to select the interrupt address for serial port 4. Î Disabled

IQ7 Design Guide Page 87 Î ECP+EPP The parallel port operates in the extended capabilities port (ECP) mode. The ECP mode supports bi-directional co